งานนำเสนอกำลังจะดาวน์โหลด โปรดรอ

งานนำเสนอกำลังจะดาวน์โหลด โปรดรอ

Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement.

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งานนำเสนอเรื่อง: "Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement."— ใบสำเนางานนำเสนอ:

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2 Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement arithmetic Arithmetic building blocks

3 Powers of Decimal Equivalent ,024 2,048 4,096 8,192 16,384 32,768 65,536 Abbreviation 1K 2K 4K 8K 16K 32K 64K

4 Decimal-Binary Equivalences Decimal ,023 2,047 4,095 8,191 16,383 32,767 65,535 Binary Hexadecimal F 1F 3F 7F FF 1FF 3FF 7FF FFF 1FFF 3FFF 7FFF FFFF

5 Binary addition = = = = 10 = 0 + carry of 1 into next position = 11 = 1 + carry of 1 into next position ABSUMCO HALF ADDER A B SUM CO Carry-Out = SUM = (AB) (AB) + (AB)

6 Binary addition Carry-Out = SUM = 1-bit 8 Strings Full Adder with Carry-In and Carry-Out CIABSUMCO FULL ADDER A B SUM CO CI (A B)CI + (A B)CI + + (AB)CI + (A+B)CI

7 1-bit 8 Strings Full Adder with Carry-In and Carry-Out SUM = FULL ADDER A B SUM CO CI (A B)CI + (A B)CI + + Carry-Out = (AB)CI + (A+B)CI

8 Binary addition

9 Binary Subtraction = = = = 1 ต้องยืมจากหลักที่สูงกว่า มา 1 ABSUBBO HALF Subtractor A B SUB BO Borrow-Out = SUB =

10 Binary Subtraction Borrow-Out = SUB = 1-bit 8 Strings Full Subtractor with Borrow-In and Borrow -Out BIABSUBBO FULL Subtractor A B SUB BO BI

11 REPRESENTING UNSIGNED NUMBERS (Absolute value) A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =00H B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =FFH

12 REPRESENTING SIGNED NUMBERS in sign-magnitude form A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 = SIGN BIT Magnitude = B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 = SIGN BIT Magnitude = 52 10

13 REPRESENTING SIGNED NUMBERS in the 2 ’ S-complement system A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 = SIGN BIT True binary B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 = SIGN BIT 2 ’ s complement

14 Range of Sign-Magnitude Numbers A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =+1 10 SIGN BIT B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 = A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 = B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =-1 10

15 Range of Sign-Magnitude Numbers A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =+1 10 SIGN BIT B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 = A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 = B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =-1 10

16 การคอมพลีเมนต์ เลขฐานสอง แบ่งออกเป็น คอมพลีเมนต์ 1 (1 ’ s complement) คอมพลีเมนต์ 2 (2 ’ s complement) การคอมพลีเมนต์เลขฐานสองนี้นำไปใช้ เกี่ยวกับการคำนวณทางไมโครคอมพิวเตอร์ มาก เพราะว่าจะใช้ในลักษณะการลบด้วย วิธีการบวกด้วยคอมพลีเมนต์ สรุป การลบด้วยการบวกด้วยคอมพลีเมนต์ นั้นจะทำนองเดียวกับการคอมพลีเมนต์ เลขฐานสิบ

17 การคอมพลีเมนต์ เลขฐานสอง X 3 X 2 X 1 X 0 = ’s complement X 3 X 2 X 1 X 0 = ’s complement 2’s complement = 1’s complement + 1 X3X3 X3X3 X2X2 X2X2 X1X1 X1X1 X0X0 X0X0

18 Positive and Negative Numbers MagnitudePositiveNegative

19 2 ’ S-complement representation summary Positive numbers always have a sign bit of 0, and negative numbers always have a sign bit of 1. Positive numbers are stored in sign-magnitude form. Negative numbers are stored as 2’s complements. Taking the 2’s complement is equivalent to a sign change.

20 Example : Binary contentsHexadecimal contentsDecimal contents ____ ____ ___ ___ 14H DDH ___H BDH ___H 70H ___H 6EH _____H +20 ___ +47 ___ -125 ___ -19, F E B2DA

21 CASE 4 Both negative ADDITION CASE 1 Both positive ’s complement arithmetic CASE 2 Positive and smaller negative (-68) CASE 3 Positive and larger negative (- 115) (-78 )

22 SUBTRACTION CASE 1 Both positive ’s complement arithmetic CASE 2 Positive and smaller negative (- 16) (+27) CASE 3 Positive and larger negative (+ 108) CASE 4 Both negative (+78 )

23 INVERT A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 Y7Y7 Y6Y6 Y5Y5 Y4Y4 Y3Y3 Y2Y2 Y1Y1 Y0Y A 7 -A Y 7 -Y Y 7 -Y INVLOGIC Controlled inverter

24 ADD/SUB A7A7 A 6 A5A5 A4A4 A 3 A 2 A 1 A0A0 S7S7 S 6 S5S5 S4S4 S 3 S2S2 S1S1 S0S0 B7B7 B 6 B5B5 B4B4 B 3 B 2 B 1 B 0 ADDITION A 7 A 6 A 5 A 4 A 3 A 2 A 1 A0A0 +B 7 B 6 B 5 B 4 B 3 B 2 B 1 B0B0 S 7 S 6 S 5 S 4 S 3 S 2 S 1 S0S0 SUBTRACTION A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 +B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0 +1 S 7 S 6 S 5 S 4 S 3 S 2 S 1 S Binary adder-subtractor diagram S8S8

25 Binary adder-subtractor circuit ADD/


ดาวน์โหลด ppt Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement.

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