งานนำเสนอกำลังจะดาวน์โหลด โปรดรอ

งานนำเสนอกำลังจะดาวน์โหลด โปรดรอ

Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement.

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งานนำเสนอเรื่อง: "Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement."— ใบสำเนางานนำเสนอ:

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2 Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement arithmetic Arithmetic building blocks

3 Powers of 2 2 0 2 12 2 3 2 4 2 5 2 6 2 7 2 8 2 9 2 10 2 11 2 12 2 13 2 14 2 15 2 16 Decimal Equivalent 1 2 4 8 16 32 64 128 256 512 1,024 2,048 4,096 8,192 16,384 32,768 65,536 Abbreviation 1K 2K 4K 8K 16K 32K 64K

4 Decimal-Binary Equivalences Decimal 1 3 7 15 31 63 127 255 511 1,023 2,047 4,095 8,191 16,383 32,767 65,535 Binary 1 11 111 1111 1 1111 11 1111 111 1111 1111 1 1111 1111 11 1111 1111 111 1111 1111 1111 1111 1111 1 1111 1111 1111 11 1111 1111 1111 111 1111 1111 1111 1111 1111 Hexadecimal 1 3 7 F 1F 3F 7F FF 1FF 3FF 7FF FFF 1FFF 3FFF 7FFF FFFF

5 Binary addition 0 + 0 = 0 0 + 1 = 1 1 + 0 = 1 1 + 1 = 10 = 0 + carry of 1 into next position 1 + 1 + 1 = 11 = 1 + carry of 1 into next position ABSUMCO 0000 0110 1010 1101 HALF ADDER A B SUM CO Carry-Out = SUM = (AB) (AB) + (AB)

6 Binary addition Carry-Out = SUM = 1-bit 8 Strings Full Adder with Carry-In and Carry-Out CIABSUMCO 00000 00110 01010 01101 10010 10101 11001 11111 FULL ADDER A B SUM CO CI (A B)CI + (A B)CI + + (AB)CI + (A+B)CI

7 1-bit 8 Strings Full Adder with Carry-In and Carry-Out SUM = FULL ADDER A B SUM CO CI (A B)CI + (A B)CI + + Carry-Out = (AB)CI + (A+B)CI

8 Binary addition

9 Binary Subtraction 0 - 0 = 0 1 - 0 = 1 1 - 1 = 0 0 - 1 = 1 ต้องยืมจากหลักที่สูงกว่า มา 1 ABSUBBO 0000 0111 1010 1100 HALF Subtractor A B SUB BO Borrow-Out = SUB =

10 Binary Subtraction Borrow-Out = SUB = 1-bit 8 Strings Full Subtractor with Borrow-In and Borrow -Out BIABSUBBO 00000 00111 01010 01100 10011 10101 11000 11111 FULL Subtractor A B SUB BO BI

11 REPRESENTING UNSIGNED NUMBERS (Absolute value) 00 000000 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =00H 11 111111 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =FFH

12 REPRESENTING SIGNED NUMBERS in sign-magnitude form. 00 110100 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =+52 10 SIGN BIT Magnitude = 52 10 10 110100 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =-52 10 SIGN BIT Magnitude = 52 10

13 REPRESENTING SIGNED NUMBERS in the 2 ’ S-complement system. 00 101101 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =+45 10 SIGN BIT True binary 11 010011 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =-45 10 SIGN BIT 2 ’ s complement

14 Range of Sign-Magnitude Numbers 00 000001 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =+1 10 SIGN BIT 01 111111 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =+127 10 10 000001 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =-127 10 11 111111 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =-1 10

15 Range of Sign-Magnitude Numbers 00 000001 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =+1 10 SIGN BIT 01 111111 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =+127 10 10 000001 A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 =-127 10 11 111111 B7B7 B6B6 B5B5 B4B4 B3B3 B2B2 B1B1 B0B0 =-1 10

16 การคอมพลีเมนต์ เลขฐานสอง แบ่งออกเป็น คอมพลีเมนต์ 1 (1 ’ s complement) คอมพลีเมนต์ 2 (2 ’ s complement) การคอมพลีเมนต์เลขฐานสองนี้นำไปใช้ เกี่ยวกับการคำนวณทางไมโครคอมพิวเตอร์ มาก เพราะว่าจะใช้ในลักษณะการลบด้วย วิธีการบวกด้วยคอมพลีเมนต์ สรุป การลบด้วยการบวกด้วยคอมพลีเมนต์ นั้นจะทำนองเดียวกับการคอมพลีเมนต์ เลขฐานสิบ

17 การคอมพลีเมนต์ เลขฐานสอง X 3 X 2 X 1 X 0 = 1000 1’s complement X 3 X 2 X 1 X 0 = 0111 2’s complement 2’s complement = 1’s complement + 1 X3X3 X3X3 X2X2 X2X2 X1X1 X1X1 X0X0 X0X0

18 Positive and Negative Numbers -8 -7 -6 -5 -4 -3 -2 -1 0 +1 +2 +3 +4 +5 +6 +7 1000 1001 1010 1011 1100 1101 1110 1111 0000 0001 0010 0011 0100 0101 0110 0111 MagnitudePositiveNegative 1234567812345678 0001 0010 0011 0100 0101 0110 0111 - 1111 1110 1101 1100 1011 1010 1001 1000

19 2 ’ S-complement representation summary Positive numbers always have a sign bit of 0, and negative numbers always have a sign bit of 1. Positive numbers are stored in sign-magnitude form. Negative numbers are stored as 2’s complements. Taking the 2’s complement is equivalent to a sign change.

20 Example : Binary contentsHexadecimal contentsDecimal contents 0001 0100 ____ 1001 1110 ____ ___ ___ 14H DDH ___H BDH ___H 70H ___H 6EH _____H +20 ___ +47 ___ -125 ___ -19,750 1101 -35 0010 1111 2F 1011 1101 -67 9E -98 0111 0000 +112 1000 0011 83 0110 1110 110 1011 0010 1101 1010 B2DA

21 CASE 4 Both negative. -43 -78 ADDITION CASE 1 Both positive. +83 +16 2’s complement arithmetic 0101 0011 0001 0000 83 0101 0011 + 16 + 0001 0000 99 0110 0011 CASE 2 Positive and smaller negative. +125 -68 0111 1101 1011 1100 125 0111 1101 +(-68) +1 011 1100 57 1 0011 1001 CASE 3 Positive and larger negative. +37 -115 37 0010 0101 +(- 115) + 1000 1101 -78 1011 0010 1101 0101 1011 0010 -43 1101 0101 +(-78 ) + 1011 0010 -121 1 1000 0111 0010 0101 1000 1101

22 SUBTRACTION CASE 1 Both positive. +83 +16 2’s complement arithmetic 0101 0011 0001 0000 CASE 2 Positive and smaller negative. +68 -27 83 0101 0011 +(- 16) + 1111 0000 67 1 0100 0011 0100 1110 0101 68 0100 +(+27) + 0001 1011 95 0101 1111 CASE 3 Positive and larger negative. +14 -108 14 0000 1110 +(+ 108) + 0110 1100 122 0111 1010 1101 0101 1011 0010 CASE 4 Both negative. -43 -78 -43 1101 0101 +(+78 ) + 0100 1110 35 1 0010 0011 0000 1110 1001 0100

23 INVERT A7A7 A6A6 A5A5 A4A4 A3A3 A2A2 A1A1 A0A0 Y7Y7 Y6Y6 Y5Y5 Y4Y4 Y3Y3 Y2Y2 Y1Y1 Y0Y0 001001 A 7 -A 0 0110 1110 Y 7 -Y 0 0110 1110 Y 7 -Y 0 1001 0001 INVLOGIC Controlled inverter

24 ADD/SUB A7A7 A 6 A5A5 A4A4 A 3 A 2 A 1 A0A0 S7S7 S 6 S5S5 S4S4 S 3 S2S2 S1S1 S0S0 B7B7 B 6 B5B5 B4B4 B 3 B 2 B 1 B 0 ADDITION A 7 A 6 A 5 A 4 A 3 A 2 A 1 A0A0 +B 7 B 6 B 5 B 4 B 3 B 2 B 1 B0B0 S 7 S 6 S 5 S 4 S 3 S 2 S 1 S0S0 SUBTRACTION A 7 A 6 A 5 A 4 A 3 A 2 A 1 A 0 +B 7 B 6 B 5 B 4 B 3 B 2 B 1 B 0 +1 S 7 S 6 S 5 S 4 S 3 S 2 S 1 S 0 - - - - Binary adder-subtractor diagram S8S8

25 Binary adder-subtractor circuit. 7483 ADD/


ดาวน์โหลด ppt Arithmetic circuits Binary addition Binary Subtraction Unsigned binary numbers Sign-magnitude numbers 2 ’ S Complement representation 2 ’ S Complement.

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